Forum Discussion
Occasional ContributorCyclone 10GX PCIe / Raspberry Pi
Hi,
We have a PCIe controller using the Cyclone 10Gx with the PCIe hard IP. It works when connected to a Windows system but it isn't getting detected when connected on a Raspberry Pi 5 or CM5 system.
On the Pi, i see that the LTSSM transitions from Detect.Active to Polling.Active to Polling.Compliance to link down. I think this suggests that the Pi isn't detecting any device on the other end.
I tried isolating the power on sequencing by hooking up an external power supply to the PCIe card, but it didn't help.
Any guidance would be much appreciated.
Thanks!
8 Replies
Wincent_AlteraRegular Contributor
Hi,
Which design that you are using ? is it a custom design or the design generated from the Quartus IP catalog ?
I would suggest to try from the example design.
If it is stuck at Detect.Active it seen like the board connection problem in most of the time.
Can you share with me a simple block diagram how you connect the C10 with the Raspberry Pi ?
Regards,
Wincent_Altera
JBaylHi Wincent,
For the FPGA, its a custom design based the example project. Basically just the PCIe Hard IP and our custom IP is connected through the Bar2 avalon MM bus.
It's not stuck at Detect.Active, it goes through Polling.Compliance then link down.
I looked at turning on/off termination on refclk but it appears internal termination is turned on by default for the Cyclone10Gx.
We have 2 setups, a full Raspberry Pi 5 and a CM5. Then we use a converter/breakout board for both to convert the Pi's PCIe interface to a standard PCIe x1 slot. Link below:
Note that we have an older PCIe card design which uses NXP's PX1011B PCIe X1 PHY and this gets recognized by Windows as well as the Raspberry Pi on the same hardware setup.
Thanks!
- Wincent_Altera
Hi JBayl ,
Can you please share the overall block diagram to me , on how you connect the Raspberry Pi with Cyclone 10 ?
Just a simple block drawing with connection will do, it help me better visualize your system work.
Do your cyclone 10 board have golden finger ?
instead of connect to the Raspberry Pi, do you try to connect into any Host/Computer and check if it can be link up successful or not ?
Regards,
Wincent - Wincent_Altera
Hi JBayl ,
Do you have any available commercial host CPU with PCie golden finger slot ?
Can you please try the version 2 , with same design / .sof to it and see if you were able to navigate the Fpga ?
For the FPGA, its a custom design based the example project. Basically just the PCIe Hard IP and our custom IP is connected through the Bar2 avalon MM bus.
>> I would suggest to use the example design generated from the Quartus IP catalog directly (without any modification) and see if the link up is success or not
>> That we can better narrow down either the issue is coming from the HW or design itself
Regards,
Wincent
- JBayl
Here's a rough drawing of our Raspberry Pi prototype system:
Our PCIe controllers (Version 1 and Version 2) are standard PCIe x1 PCBs with golden finger that can plugged into Windows PCs.
Version 1, works on Windows PCs and gets detected by Raspberry Pi (lspci)
Version 2, works on Windows PCs and does not get detected by Raspberry Pi.
- Wincent_Altera
Hi JBayl ,
The picture is clear for me to understand the system setup.
May I know what is the different between Version 1 vs Version 2 ?
Is it different device or ?
Regards,
Wincent- JBayl
Version1 uses NXP's PX1011B PCIe X1 PHY with an interface to a Cyclone 3 FPGA.
Version2 uses a Cyclone10Gx FPGA. No external PHY.
