Altera_Forum
Honored Contributor
15 years agocompilation problem in simulation
im using triple speed ethernet megacore to bring up rgmii interface with phy
and i want to check how loopback is working in simulation while im complilng im not able to compile the altera_tse_top_gen_host file if we open the path we cant able to see any thing ... so any one know the solution to bring up the simulation for triple speed ethernet inform me with out fail reply as soon as possible Revert for any clarifications