Forum Discussion
Altera_Forum
Honored Contributor
17 years agoClocked video output
Hello
I'm trying to use the Clocked Video Output IP with the SOPC builder I need to output a NTSC (4:3 525 lines) video with separate sync signals. To create the separate sync signals the wizard needs the following parameters: Field 1 Horizontal sync (pixels) Horizontal front porch (pixels) Horizontal back porch (pixels) Vertical sync (lines) Vertical front porch (lines) Vertical back porch (lines) Field 0 F rising edge line F falling edge line Vertical blanking rising edge line Vertical sync (lines) Vertical front porch Vertical back porch I've tried different combinations (which I thought were OK) but couldn't get the video correctly sync'd. Anyone knows the correct values? Thank you Thiago21 Replies
- Altera_Forum
Honored Contributor
There is a spreadsheet available to calculate these values from VESA:
www.vesa.org/public/cvt/cvtd6r1.xls See if it helps you. Jake - Altera_Forum
Honored Contributor
Have you tried to read:
http://www.altera.com/literature/ug/ug_vip.pdf It seems that there are suggestions for these parameters there. - Altera_Forum
Honored Contributor
Thank you Jake and OrchestraDirector
I did try the configuration suggested in the CVTd6r1.xls but it still wouldn't work At the ug_vip.pdf I didn't find any suggestions, could you point me the exact location OrchestraDirector? Anyone used this Clocked_Video_Output with separate sync signals? Did it work? What configuration did you use? Thank you Thiago - Altera_Forum
Honored Contributor
I thought that the suggestions at page A-13 and A-14 could be useful for your purpose.
- Altera_Forum
Honored Contributor
Oh, these are only the default values and unfortunately the separate sync values are zero in this mode
Thank you! Thiago - Altera_Forum
Honored Contributor
--- Quote Start --- Hello I'm trying to use the Clocked Video Output IP with the SOPC builder I need to output a NTSC (4:3 525 lines) video with separate sync signals. To create the separate sync signals the wizard needs the following parameters: Field 1 Horizontal sync (pixels) Horizontal front porch (pixels) Horizontal back porch (pixels) Vertical sync (lines) Vertical front porch (lines) Vertical back porch (lines) Field 0 F rising edge line F falling edge line Vertical blanking rising edge line Vertical sync (lines) Vertical front porch Vertical back porch I've tried different combinations (which I thought were OK) but couldn't get the video correctly sync'd. Anyone knows the correct values? Thank you Thiago --- Quote End --- Hi Thiago, what output format are driving with the CVO? DVI, VGA? Could you post the settings you are using or a screenshot of the settings you are using? Also what are you driving the CVO with? It needs to be fed with interlaced video for NTSC output to work. It can't create interlaced video from a progressive input. Regards, Gareth. - Altera_Forum
Honored Contributor
Hello Gareth!
I'm using the Test Pattern Generator (from Altera) to feed the clocked video output. I configured it to generate a 720x486 pixels interlaced colorbar (F0 synchronized). The colorspace is YCbCr with 10 bits per color space using 4:2:2 sampling. The clocked video output is configured like this: Image Width: 720 pixels Image Height: 486 lines Bits per pixel per color plane: 10 Number of color planes: 2 Color plane transmission format: parallel Interlaced video checked Pixel fifo size: 720 pixels Sync signals: on separate wires The synchronization signals settings are what I need to know Using embedded sync signals the video was output perfectly, but I really need the external sync signals to drive other components Thiago - Altera_Forum
Honored Contributor
Hi Thiago,
--- Quote Start --- The synchronization signals settings are what I need to know Using embedded sync signals the video was output perfectly, but I really need the external sync signals to drive other components Thiago --- Quote End --- One issue you may have run into is that the NTSC format is actually has 487 lines (f0 - 244, f1 - 243). To get the same frame as the embedded syncs mode (minus the bt656 embedding) put the values in with no fp or bp: active width = 720 active height = 487 horizontal sync = 138 horizontal fp = 0 horizontal bp = 0 vertical sync = 19 vertical fp = 0 vertical bp = 0 f0 vertical sync = 19 f0 vertical fp = 0 f0 vertical bp = 0 f rising edge line = 266 f falling edge line = 4 vertical blanking rising edge line = 264 There's a bug in the GUI where the 'active picture line' gets greyed out in seperate sync mode. Make sure it is set to 20 (switch the embedded sync mode to make it editable). This mode won't output bt656, if you need that you'll have to embed the syncs yourself. Do you require an embedded sync mode where you can see the sync signals v,h,f? The test pattern generator doesn't support odd numbers of lines in interlaced format though so you won't be able to get it to output 487 lines. Regards, Gareth. - Altera_Forum
Honored Contributor
Wow, thank you so much Gareth!
Worked perfectly! Where did you get these values from? I'll need to output HD (1080i) later so it would be useful for me to know how to get (or calculate) them Thanks again! Regards Thiago - Altera_Forum
Honored Contributor
Hello everyone,
I desperately need help with getting my embedded sync bt656 clocked out IP to work. I have connected the test generator module found in the VP 8.0 reference example, and connected it to the Clocked Out video ip. Then connected the Video output 8 bit bus to my ADV7171 video IC.( which has been tested with its internal color bar.) The test generator is set to send := 422 ycrcb 720 by 486 The Video Clocked out IP is set to Embedded sync mode, 720 by 486 active picture and 8 bit , 2 symbols per beat and interlaced. synce field one is Active Picture line=20 Horizontal Blanking =138 Vertical Blanking = 20 Field zero F rising=266 F falling =4 vertical blanking rising edge line =264 vertical blanking =19 All I end up getting is a black screen, and when brightness is turned up it is light green vertical lines. Please can some one help me with this problem , it will be greatly appreciated. regards, Nadeem