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15 years ago

Avalon and native interface

Hello Friends,

I am studying the Altera ddr2 sdram controller. My aim is to develop a logic that shall generate the address and the data (write and read). I am interfacing this logic to the controller,which in turn is interfaced to a memory module outside the chip. I am new to these topics and I have the following querries pls-

1) The controller data sheet states there are 2 interfaces viz the Avalon and the native. What is the native interface ?

2) My logic ,in this case is the master and the controller is the slave. Is my supposition correct?

3) Can you direct me to an example where-in such a connection is done via the Avalon and also the timing diagrams(other than the ones found in the Avalon interface data-sheet,if possible).

Regards,

Vinod Karuvat.

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