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Altera_Forum
Honored Contributor
15 years agoAvalon and native interface
Hello Friends, I am studying the Altera ddr2 sdram controller. My aim is to develop a logic that shall generate the address and the data (write and read). I am interfacing this logic to the c...
Altera_Forum
Honored Contributor
15 years agoIf I remember correctly the native interface interleaves the address and data. The Avalon version presents them concurrently. There could be other differences but that's all I remember. Native is meant mostly for standalone mode and Avalon for SOPC Builder/Qsys.
Here are some old master templates that you can take a look at that expose the master data outside of SOPC Builder and Qsys: http://www.altera.com/support/examples/nios2/exm-avalon-mm.html?gsa_pos=1&wt.oss_r=1&wt.oss=templates Here are some other examples of mastering components which might be overkill for what you are doing but may give you some ideas: http://www.altera.com/support/examples/nios2/exm-modular-scatter-gather-dma.html?gsa_pos=1&wt.oss_r=1&wt.oss=sgdma http://www.altera.com/support/examples/design-entry-tools/qsys/exm-qsys-tut.html?gsa_pos=3&wt.oss_r=1&wt.oss=qsys (note the last link is a Qsys design but the components show work just fine in SOPC Builder).