ASMII parallel read dataout is all zeros

Hello,

I noticed this issue for all addresses on the first 2 pages (starting at 0x0).

I eventually determined that the root of this problem seems to be related to Altera's IP core. For whatever reason, the ASMII parallel IP core has terrible fanout and key signals are easily synthesized away signals (even though the physical QSPI pins are interfaced within the module). Adding synthesis attribute noprunes and adding additional registers to help reduce this fanout helped and prevented key registers from being synthesized away.

An example of this would be the ASMII parallel IP core's busy signal. This busy signal is connected to an actual busy pin on the flash chip, yet it can be synthesized away without proper noprune synthesis attributes. Any ideas as to why this could be happening? Does this have something to do with the way the IP core is synthesized (the pins aren't called out in the QSF/pin assigner)?

Kind Regards,

James