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Honored Contributor
Honored Contributoraltclkctrl mux with 2 pll outputs as inputs
I have clk_a and clk_b from 2 pll outputs, and I want to mux them to clk_out with altclkctrl. but Q2 complaints that altclkctrl inputs " must be driven by 1 PLLs but is driven by 2 PLLs" . What can i...
Altera_ForumHonored Contributor
Honored ContributorAnother way of generating clk to output pins is the use of DDR out instant. set one input high, the other low , the dataout is your clk. additionally you can add clk enable as required. This allows for edge alignment as well. Data need not be DDR.
