Forum Discussion

dc3's avatar
dc3
Icon for New Contributor rankNew Contributor
4 months ago

Agilex 7 I Series Development Kit: External hardware access error when programming

I have a compiled design that I would like to test that implements Ethernet on F-Tile. When I try to program the FPGA with my bitstream, it stops and prompts me with the following errors:

Would anyone know how to fix this or have insight on why this is happening? 

Ethernet
general
Transceiver

3 Replies

  • dc3's avatar
    dc3
    Icon for New Contributor rankNew Contributor
    3 months ago

    I ended up fixing this. The SDM pins/signals & configuration were not set correctly for the Agilex 7 board I had. 

    • paveetirrasrie_Altera's avatar
      paveetirrasrie_Altera
      Icon for Frequent Contributor rankFrequent Contributor
      3 months ago

      Hello Daniel,

       

      Glad to hear the issue got resolved.

      If you have a new question, feel free to open a new thread to get the support from Altera experts. 
      Otherwise, the community users will continue to help you on this thread. 
      Thank you.

  • paveetirrasrie_Altera's avatar
    paveetirrasrie_Altera
    Icon for Frequent Contributor rankFrequent Contributor
    3 months ago

    Hello Daniel,

     

    May I which design are you working with and what is the OPN?

    Mismatch OPN could be the possible rootcause.

     

    Regards,

    Pavee