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MikeH1's avatar
MikeH1
Icon for New Contributor rankNew Contributor
4 years ago

A10 PCIe Device not seen by Windows

As shown in SigTap snapshot below, there is an extra pulse of app_nreset_status at sample 61. When this happens, the PCIe device does not enumerate correctly in Windows.

I also have a dump of raw data values for capture below if that helps.

Any ideas what could cause this extra reset to be issued?

Thanks.

7 Replies

  • KhaiChein_Y_Intel's avatar
    KhaiChein_Y_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi,


    May I know which device family you are using? Could you share the stp file?


    Thanks.

    Best regards,

    KhaiY


  • KhaiChein_Y_Intel's avatar
    KhaiChein_Y_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi,


    May I know what is the speed and link width you are trying to achieve? Could you check if the power supply (VCCR_GXB) is set correctly in the Assignment editor and measure the power supply (VCCR_GXB) supplied to FPGA board is matched with voltage set in the design setting?


    Thanks

    Best regards,

    KhaiY





    • MikeH1's avatar
      MikeH1
      Icon for New Contributor rankNew Contributor
      4 years ago

      PCIe Core mode is set to: Gen3 X2, 128bit, 125MHz

      VCCR_GXB is 1.03V when measured on the board (pins J19 and J20).

      I don't see where these pins (J19 and J20) are called out in the assignment editor, where are these located?

      Thx.

  • KhaiChein_Y_Intel's avatar
    KhaiChein_Y_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi,


    You may set the assignment using the pin planner or assignment editor


    For Pin Planner


    1. Right-click on a blank area in the All Pins list and select Customized Columns
    2. Select VCCR_GXB / VCCT_GXB Voltage from Available Columns and click the> button
    3. Make sure it is added to the All Pins list and select the transceiver pin voltage you want to change


    ■ For Assignment Editor


    1. Register the corresponding XCVR pin name in the To field
    2. Select VCCR_GXB / VCCT_GXB Voltage in the Assignment Name field
    3. Select the voltage of the corresponding XCVR pin


    From the Fault Tree Analysis (FTA) for Arria 10 PCIe Link Up Issue

    https://community.intel.com/t5/FPGA-Wiki/FTA-PCI-express/ta-p/735993, I believe you are at Is rx_std_signaldetect asserted (Hypothesis 4). Can you try the suggestions in FTA_Table_View (No 4)?


    If the suggestions in the FTA are not helpful, could you try to run at lower speed and see if this is a problem running at Gen3?


    Thanks

    Best regards,

    KhaiY




  • KhaiChein_Y_Intel's avatar
    KhaiChein_Y_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi,


    We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you


    Best regards,

    KhaiY