Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

which message is sent from DE115 in wireshart capture file

https://skydrive.live.com/redir?resid=e0ed7271c68be47c!302

can i send data through ethernet like this and captured by wireshark?

or i need to send a real ethernet frame?

LIBRARY ieee;

USE ieee.std_logic_1164.all;

ENTITY LabT1 IS

PORT ( SW : IN STD_LOGIC_VECTOR(17 DOWNTO 0);

LEDR : OUT STD_LOGIC_VECTOR(17 DOWNTO 0);

--Input

CLOCK_50 : IN STD_LOGIC;

--ENET0_INT_N

--ENET0_LINK100

ENET0_RX_CLK : IN STD_LOGIC;

--ENET0_RX_COL

--ENET0_RX_CRS

ENET0_RX_DATA : IN STD_LOGIC_VECTOR(3 DOWNTO 0);

--ENET0_RX_DV

--ENET0_RX_ER

ENET0_TX_CLK : IN STD_LOGIC;

--Output

ENET0_GTX_CLK : OUT STD_LOGIC;

--ENET0_MDC

--ENET0_RST_N

ENET0_TX_DATA : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);

ENET0_TX_EN : OUT STD_LOGIC

--ENET0_TX_ER

);

END LabT1;

ARCHITECTURE Behavior OF LabT1 IS

BEGIN

--LEDR <= SW;

tx_process : process(CLOCK_50)

begin

if SW(0) = '1' then

ENET0_TX_DATA <= "0001";

ENET0_TX_DATA <= "1110";

end if;

end process tx_process;

END Behavior;

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    No you need to send a real Ethernet frame. Besides you need to use ENET0_TX_CLK as clock for the TX signals, you need to assert ENET0_TX_EN when you send data and you need to use DDR I/O if the PHY chip is in gigabit mode.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    as i know, it need to send two nibbles in two clock cycle

    which output is for signaling it i send high nibble or low nibble?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    it's my first time to know Altera TSE.

    i do not find any material teaching how to use Altera TSE in CD given in DE115. is it a existing MAC function in DE115? how to use it? it said triple speed, does it mean giga speed times 3 = speed?

    another reason is that i would like to DIY a simple switch, so need MAC
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    I don't have this kit, but you must have an example project with an Ethernet interface with the kit.

    The TSE is an IP that you can include in the FPGA project, either from the megawizard or from SOPC Builder / QSys. Triple speed means that it supports 10Mb/s, 100Mb/s and 1Gb/s Ethernet protocols.