Forum Discussion

MartinMaa's avatar
MartinMaa
Icon for Occasional Contributor rankOccasional Contributor
1 month ago
Solved

What is the difference between these two clear signals?

Hi, I’m currently investigating an issue. I’m using an FPGA SCFIFO to replace a 72V251 FIFO, with rclk = wclk. I found that if I keep rebooting the device, my industrial camera occasionally shows im...
Configuration
  • sstrell's avatar
    sstrell
    1 month ago

    All documented: 

    https://docs.altera.com/r/docs/683522/25.1.1/fifo-ip-user-guide/fifo-synchronous-clear-and-asynchronous-clear-effect

ZiYingE_Altera's avatar
ZiYingE_Altera
Icon for Contributor rankContributor
1 month ago

Thanks, sstrell, for sharing the documentation link. 

 

Hi MartinMaa,
 

Regarding the image tearing issue, I noticed that you had previously filed a support ticket for a similar problem. May I check is issue has been resolved?
 

For the differences between synchronous clear and asynchronous clear, you may refer to the documentation link shared by sstrell, at Section 1.7 FIFO Synchronous Clear and Asynchronous Clear Effect. 
 

Regards,
ZiYingE_Altera

MartinMaa's avatar
MartinMaa
Icon for Occasional Contributor rankOccasional Contributor
1 month ago

Hi, ZiYingE

These issues have now been resolved. Thank you.

  • ZiYingE_Altera's avatar
    ZiYingE_Altera
    Icon for Contributor rankContributor
    1 month ago

    Hi MartinMaa, 

    I'm glad that your issue is resolved. I will proceed with closing this case. We will continue to monitor this post for the next 5 days. If there are no further inquiries during this period, I will step back and allow the community to assist with any future follow-up questions.

    Thank you for engaging with us!

    Best regards,
    ZiYingE_Altera