Forum Discussion
New ContributorUSing VCS RTL Simulation from quartus pro generated code
HI,
I am using Quartus pro 21.2
1) Generate Simulation model for VCS
2) go to generate folder
( Audio.v : my generated PLL name )
3) This is user Guide for quartus prime pro
4) In server.
soruce genetated.tcl Not working.
5) Guide and script content not same
this is generated file.
this is guide.
--> How to RTL simulation from quatus pro geneated IP?
Just edited script not help.
I need help.
8 Replies
- RichardT_altera
Super Contributor
Hi @minjoolee
Have you Generate the Simulator Setup Script in the document section 2.5.3.2.1. ?
Intel Quartus Prime Pro Edition User Guide: Third-party Simulation
Tools > Generate Simulator Setup Script for IP
The script should be in vcs_setup.sh or vcsmx_setup.sh files generated in your project directory.
Please go through Section 2 Intel FPGA Simulation Basics first to understand the simulation flow before go to section 4.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.
minjooleeHI , this is my answer
Have you Generate the Simulator Setup Script in the document section 2.5.3.2.1. ?
--> YES
SEE second screen shots
1) scripts result are not same as
Intel Quartus Prime Pro Edition User Guide: Third-party Simulation
2) Without ignore comments in script,
cmd> source vcs_setup.sh
should be working. but not.
3) Can I get simple example such as only 1 PLL design for VCS RTL simulation .
to see waveform ( generated FSDB )
Thanks
- RichardT_altera
I think you are using the incorrect command.
Try using sh vcsmx_setup.sh instead.
source vcsmx_setup.sh is for sourcing the Synopsys VCS MX Simulator Setup Scripts.
Go through the Questa Quick Start then you will understand the simulation flow.
