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Altera_Forum's avatar
Altera_Forum
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17 years ago

update QuartusII top-entity after modify the standard example

Hello,everyone.

I am new to QuartusII series software.

recently I follow the tutorial of ERIKA Enterprise about 2cpu design.

With a start of standard example in the installation directory,I complete the generation of SOPCBuilder part.

and I am confused about the following instruction in the tutorial:

go back to quartus ii, and update the symbol. connect back all the various pins

of the standard design, to their respective components.

the top entity of the project is a vhd file. From the context it seems like a bdf top entity.

How to update the symbol, since I changed the default component name and make some additions in the SOPCBuilder.

Looking forward to your reply.

Thank you very much!!

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    After every generation SOPC Builder creates a file called your_sopc_file_name.vhd, search an entity with same name on it. There you will see the new signals and their names. So, in the top-level entity you can correct necessary parts in "portmap" code.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    --- Quote Start ---

    After every generation SOPC Builder creates a file called your_sopc_file_name.vhd, search an entity with same name on it. There you will see the new signals and their names. So, in the top-level entity you can correct necessary parts in "portmap" code.

    --- Quote End ---

    Thank you for your reply!!

    I found a file named my_project_name_sopc.v in the directory.

    and compared with the original my_project_name.v, it seems like generated by sopc builder.

    it is automatically assigned as a new top-entity of the project,right?

    If I would like to create some connections between the interconnections，can I just create a partly bdf file of the project and make the connection?

    I am quite new to this,looking forward to your reply.Thank you very much!!:)
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    --- Quote Start ---

    it is automatically assigned as a new top-entity of the project,right?

    --- Quote End ---

    Usually, entity my_project_name_sopc defined in my_project_name_sopc.v, is instanced in the top-level entity (my_project_name.v). Pin assignments are made acording pin definitions on it.

    What do you mean with

    --- Quote Start ---

    If I would like to create some connections between the interconnections，

    --- Quote End ---

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    --- Quote Start ---

    Usually, entity my_project_name_sopc defined in my_project_name_sopc.v, is instanced in the top-level entity (my_project_name.v). Pin assignments are made acording pin definitions on it.

    What do you mean with

    --- Quote End ---

    "Pin assignments are made acording pin definitions on it" ,so you mean I don't need to assign the pin artificially?

    (By the way, I try to create a symbol block of the newly top-entity, and it remains 6% for a loooooooong time, seems like deadend.)

    I mean if I would like to make some links inside the NIOSII soft core, excepting the outside pin. For example, I would like to link PIO with the reset_n of the second cpu to accomplish a multiprocessor system.

    Looking forward to your reply. Thank you very much!!
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    --- Quote Start ---

    "Pin assignments are made acording pin definitions on it" ,so you mean I don't need to assign the pin artificially?

    --- Quote End ---

    I said it because you're using "standard" example, and i guess it has pin assign ments acording to its top-level entity.

    --- Quote Start ---

    (By the way, I try to create a symbol block of the newly top-entity, and it remains 6% for a loooooooong time, seems like deadend.)

    --- Quote End ---

    I didn't understand your question.

    --- Quote Start ---

    I mean if I would like to make some links inside the NIOSII soft core, excepting the outside pin. For example, I would like to link PIO with the reset_n of the second cpu to accomplish a multiprocessor system.

    --- Quote End ---

    reset_n pin is always outside sopc system same as PIO pins.