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rshal2's avatar
rshal2
Icon for Occasional Contributor rankOccasional Contributor
6 years ago
Solved

TSE phy-less is not possible ??

Hello,

Is it possible to use TSE without it trying to work with phy ?

I thought that the option "include MDIO" in platform designer should do that, but it keeps failing with:

" TSEMAC SW reset bit never cleared!",

Any idea ?

Thank you!

  • rshal2's avatar
    rshal2
    6 years ago

    Phy-less is possible.

    This is what we I did to solve this issue:

    1. In software: seems that internich can output network even if it

    detects any phy , yet we forced in getPhySpeed routine to configure

    the TSE controller to 1000 (the default in interniche code is 100, so

    we had to change it)

    2. switch is used in "unmanaged mode", i.e. it is enabled and

    configured "automatically" with default configuration (marvell

    default) on power.

    Yet, The actual problem was with RGMII delay (clock need to be phased

    shift from data, this could be solved by adding delay in fpga or in

    switch. We solved it by configuring the marvell switch rx delay bit

    (it is called"rx" in switch but it is actually the tx from fpga -

    through switch - to the output network).

    Now everything works !

    Thank you very much ,

    Ran

4 Replies

  • rshal2's avatar
    rshal2
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    Hi,

    There are systems in which MAC is not required to communicate with phy, in order to start functioning.

    I understand now that this is not possible with TSE ?

    Thanks

  • FawazJ_Altera's avatar
    FawazJ_Altera
    Icon for Frequent Contributor rankFrequent Contributor
    6 years ago

    Hello,

    PHY is needed to complete the ethernet protocol. MDIO is the component that will help to configure the PHY and generate the needed clock/s by TSE. If this connection (MDIO) is missing, this means you missed the configuration of the PHY, and you will not be able to get any link.

    The only option that might help you to not use the PHY would be the internal loopback test; usually processor > MAC > processor again. This is a mechanism to test the system and make sure it is sending and receiving data.

    Thank you,

  • FawazJ_Altera's avatar
    FawazJ_Altera
    Icon for Frequent Contributor rankFrequent Contributor
    6 years ago

    Hello,

    If you are using the RGMII mode, your MAC is expecting a clock to come from the phy. If you dont have a phy, then you should use MII.

    Thanks

  • rshal2's avatar
    rshal2
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    Phy-less is possible.

    This is what we I did to solve this issue:

    1. In software: seems that internich can output network even if it

    detects any phy , yet we forced in getPhySpeed routine to configure

    the TSE controller to 1000 (the default in interniche code is 100, so

    we had to change it)

    2. switch is used in "unmanaged mode", i.e. it is enabled and

    configured "automatically" with default configuration (marvell

    default) on power.

    Yet, The actual problem was with RGMII delay (clock need to be phased

    shift from data, this could be solved by adding delay in fpga or in

    switch. We solved it by configuring the marvell switch rx delay bit

    (it is called"rx" in switch but it is actually the tx from fpga -

    through switch - to the output network).

    Now everything works !

    Thank you very much ,

    Ran