TSE phy-less is not possible ??

Phy-less is possible.

This is what we I did to solve this issue:

1. In software: seems that internich can output network even if it

detects any phy , yet we forced in getPhySpeed routine to configure

the TSE controller to 1000 (the default in interniche code is 100, so

we had to change it)

2. switch is used in "unmanaged mode", i.e. it is enabled and

configured "automatically" with default configuration (marvell

default) on power.

Yet, The actual problem was with RGMII delay (clock need to be phased

shift from data, this could be solved by adding delay in fpga or in

switch. We solved it by configuring the marvell switch rx delay bit

(it is called"rx" in switch but it is actually the tx from fpga -

through switch - to the output network).

Now everything works !

Thank you very much ,

Ran