Altera_Forum
Honored Contributor
15 years agoThe warning about pll
HI! Everyoe!
I want to use pll to generate two clocks, one is clk_100m,and the other is clk_25m, After compilation,there is a warning: warning: PLL ""pll:pll_inst|altpll:altpll_component|pll" output port [1] feeds output pin "clk_25m" via non-dedicated routing--jittter performance depends on switching rate of other design elements.Use pll dedicated outputs to ensure jitter performance. I have not assigned pins(for I don't have a board), So I want to know if the warning still exist after the dedicated pins have been assigned??