Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThe warning about pll
HI! Everyoe! I want to use pll to generate two clocks, one is clk_100m,and the other is clk_25m, After compilation,there is a warning: warning: PLL ""pll:pll_inst|altpll:altpll_compone...
Altera_Forum
Honored Contributor
15 years agoThanks for your reply,Rysc!
and I have a new queston,after compilation,there is a such warning: warning:clock latency analysis for pll offsets is supported for the current device family,but is not enabled. Now, can you tell me what should I do to avoid the warning ?