The MSEL pins are powered by VCCINT

Hi,

the MSEL Pins should be laying in IO-Bank 6 in the 144 case. What VCC is connected to Bank 6 in your scematic?

--- Quote Start ---

but then i saw that the high level should be VCCINT (1.2V)

--- Quote End ---

Where do you see this in a datasheet?

The datasheet says "The MSEL pins are powered by VCCINT.", which in my understanding means, the input buffers are supplied by VCCINT.

I don't see a statement different from this suggestion:

--- Quote Start ---

Altera recommends connecting the MSEL pins to VCCA or GND depending on the MSEL pin settings.

--- Quote End ---

Hi FvM,

you are right. Also I have always connected the MSEL to the same voltage I used on the VCCIO Bank. An Information I had from an older datasheet version of CIII.

--- Quote Start ---

Configuration Schemes

A configuration scheme with different configuration voltage standards is

selected by driving the Cyclone III device’s MSEL pins either high or low

as shown in Table 10–1. The MSEL pins are powered by the VCCINT power

supply of the bank they reside in. The MSEL[3..0] pins have 5-kΩ

internal pull-down resistors that are always active. During power-on

reset (POR) and during reconfiguration, the MSEL pins have to be at least

LVTTL VIL or VIH levels to be considered a logic low or logic high,

respectively.

--- Quote End ---

This is also a little bit wired because first they talk about VCCINT then about the bank. Very nice ;)

I had the same problem for the Cyclone IV a few weeks ago. There the advise was to use VCCIO Bank Voltage (FAE answer). I think the main theme is to know if the voltage he is conneting to the pins is too high or not. Maybe the talkback to Altera is the best answer to be sure the FPGA won´t get damaged when he toggles the switch.

thanks so much for your replies.

Maybe through the words above i supplied,also pointed out a problem you met before .

"The MSEL pins are powered by VCCINT",didn't it mean hardwire the MSEL to VCCINT (1.2V)if want it to be high?

"Hardwire the MSEL pins to VCCA or GND without any pull-up or pull-down resistors to avoid any problems detecting an incorrect configuration scheme."i understood it as that it recommended us hardwire the MSELs to VCCA(2.5V) ,yes?

and now ,i harewire the MSELs to VCCIO(3.3V) on my PCB board.

as FvM said "the difference between using VCCA (as suggested by Altera for Cyclone III) and VCCIO (as it has been ususal with previous FPGA families) won't matter much." but actually some unexpected (http://javascript<b></b>:void(0)) problem would happen and hard to check out for us. so thought it was a confusion for me(maybe us)to decide which VCC to use .

If you want to be able change the MSEL setting easily, would it be ok to connect the MSEL pins via 10 kohm pulldowns to GND, and to use jumpers to VCCA? The 10 kohm pulldowns would be in parallel with the internal 5 kohm pulldowns (mentioned above by JacoL) just to make sure. The get a high level on the MSEL pin(s), close the jumper(s) to VCCA.

Where in the official documentation does it say that there are 5 kohm internal pulldowns?

I searched for MSEL in the data sheet, but I couldn't find it.

Please don't expect an explanation, but the device manual clearly suggests not to do what you intend. According to the manual, you should have pull-up and pull-down jumpers.

--- Quote Start ---

A configuration scheme with different configuration voltage standards is selected by driving the Cyclone III device’s MSEL pins either high or low as shown in Table 10–1. The MSEL pins are powered by the VCCINT power supply of the bank in which they reside. The MSEL[3..0] pins have 9-k&#937; internal pull-down resistors that are always active.

To avoid problems in detecting an incorrect configuration scheme, hardwire the MSEL pins to VCCA or GND without pull-up or pull-down resistors. Do not drive the MSEL pins with a microprocessor or another device.

--- Quote End ---