The MSEL pins are powered by VCCINT

Hi FvM,

you are right. Also I have always connected the MSEL to the same voltage I used on the VCCIO Bank. An Information I had from an older datasheet version of CIII.

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Configuration Schemes

A configuration scheme with different configuration voltage standards is

selected by driving the Cyclone III device’s MSEL pins either high or low

as shown in Table 10–1. The MSEL pins are powered by the VCCINT power

supply of the bank they reside in. The MSEL[3..0] pins have 5-kΩ

internal pull-down resistors that are always active. During power-on

reset (POR) and during reconfiguration, the MSEL pins have to be at least

LVTTL VIL or VIH levels to be considered a logic low or logic high,

respectively.

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This is also a little bit wired because first they talk about VCCINT then about the bank. Very nice ;)

I had the same problem for the Cyclone IV a few weeks ago. There the advise was to use VCCIO Bank Voltage (FAE answer). I think the main theme is to know if the voltage he is conneting to the pins is too high or not. Maybe the talkback to Altera is the best answer to be sure the FPGA won´t get damaged when he toggles the switch.