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xingyunzhidi's avatar
xingyunzhidi
Icon for New Contributor rankNew Contributor
7 months ago

The issue encountered during testing after programming the R-tile PCIe DMA Design Example on the Agi

I followed the instructions in section 3.5 of the Multi Channel DMA Intel® FPGA IP for PCI Express* Design Example User Guide for configuration, but encountered issues during testing. Below are the c...
Board Debug
VenT_Altera's avatar
VenT_Altera
Icon for Frequent Contributor rankFrequent Contributor
7 months ago

Hi @xingyunzhidi,


Thanks for your updates.


Could you please share and confirm with us the following items:

1. The .ip file that you used to generate the R-Tile MCDMA Design Example.

2. Quartus version used.


This will help me understand the IP configuration, design example variant, and application run.


Thanks.

Best Regards,

Ven