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Altera_Forum
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10 years ago

The Hype of SoC's

Hi, I started this post because I wanted to hear what people thought concerning the hype over FPGAs with embedded ARM processors. I have been following the news of these devices over the past years and have been very anxious to start implementing one in my hardware designs. I've been checking the Altera web site every day for news on the new Stratix 10 with its four ARM cores each running at 1Ghz. I see lots of possibilities of these new devices. My co-worker is using the Cyclone 5 with its two ARM cores and I'm always asking him how are things going? He has had the Altera training on the ARM development so he very familiar with the environment. His biggest complaints are the lack of documentation and the complexity of the tools.

My enthusiasm has waned after my conversations with him. With every new release of Quartus I'm hoping that the tools are getting easier to use with these new ARM devices. I think to myself that these tools must get easier to use when the Stratix 10 is released because I'm guessing they won't be cheap and program managers won't want to spend a bundle on these devices and then spend 8 months of FPGA/ARM development. So, the tools must get easier. With all this being said I'm very reluctant to jump on the bandwagon of FPGA's with embedded processors.

To me it is like climbing Mt. Everest in terms of complexity and cost. I'd rather climb Mt. Whitney. By that I mean find a powerful processor like the TMS320C6678 DSP from TI with 8 Cores and then connect the DSP to your FPGA over one of the common high-speed serial links such as PCIe, Rapid Serial I/O, or Gigabit Ethernet. Then only implement that serial link in your FPGA design not using QSys.

So, what are your thoughts? Please let share them.

18 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    For small things I use NIOS II, easier to use. When I use ARM SOC of Cyclone V I start from a Linux OS, not from baremetal programming.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Thanks for the comment. Do you think the ARM SOC can handle number crunching tasks like RADAR image processing? What kinds of applications do you see is a best fit for these ARM SOCs by Altera? Do you see a lot of vendors using these ARM SOC's from Altera on their new designs?

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    I am currently working on a project of real-time multi channel audio processing. Initially this was intended as a pure FPGA-based design, but by mere coincidence I got a Cyclone V eval kit with two ARM cores. Although being early in the process, I gotta tell you that I love this! The power of combining the fast, streamlined, parallel capacity of the FPGA combined with the flexibility and well-known system of Linux SW is just brilliant. In fact, with the combination of the two, the device offers a very simple customer product configuration scheme, using a standard web server running on the Linux part of the device. The SW engineer feels very at home with this.

    That being said, I can relate to your co-workers concerns. Getting the FPGA system up and running is pretty straight forward, but getting the SoC HPS system up and running has proven to be far more work than I anticipated. The learning curve is very steep, and there is a lot of do's and don'ts to be learned about this. I have to admit that I also expected the system tools to be slightly more mature. Especially with relationship to software and the process of booting. There exists a number of resources for describing how the configuration and software for boot can be made, but it's a lot of steps and there isn't any ready made automated tools for this (that I know of), so I had to make a custom build framework for this.

    I am very positive towards Qsys thou. Doing a system design with a lot of modules, and in my case, IPs that handles streams of data, is extremely tedious and error prone to knit together manually. Qsys makes this process much simpler, and e.g. by adoping the (simple) Avalon-ST interface to your IP, it very easy to do the block-to-block connection configuration in Qsys. You don't have to instantiate any hard or soft CPU in Qsys if its not needed.

    I have been working with both dedicated ARM + FPGA solutions in the past and now the SoC FPGA solution. The advantage with the HPS solutions is the ease of interfacing between the CPU and the FPGA. E.g. you don't have to bother with PCIe. The downside is that very much is configurable, which requires both the FPGA engineer and the SW-engineer to work in a completely new way of thinking. It's no longer "what can we do with the peripherals we have", but rather "what do we need". And that is were it gets complicated. You need to know how you want to build your system, including the SoC system parts. And that can be a lot to absorb.

    All in all, I expect to end up with slightly more engineering hours on FPGA and HW, but I'm hoping it will be shaved off from SW as standardized interfaces/drivers can be used. We'll see, the project is far from complete...

    Well, these are my thoughts. Hope it helps your considerations.
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Handling ethernet is faster with Linux on ARM but to do fast image processing you need hardware accelerators on FPGA side.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Thanks for adding your comments. I'm not familiar with hardware accelerators on the FPGA side. Would that be FFT megafunctions running on the FPGA side? I've heard the term hardware accelerators when reading about OpenCL but am still in the dark on the topic. Can you explain a little? Also, would you think this would apply to the Stratix 10 when it released? Also, can you share you experience developing ARM applications, has it been painful or painless? Thanks a bunch!

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    The soc thing is nothing new. People have been using processors (power pc, arms, x86 etc) alongside fpgas since the start of fpgas. Xilinx have had hard core cpus in their fpgas for at least 10 years (power pc, now arm), so altera are only now just catching up with Xilinx (10 year lag). Altera have really missed the boat on this, and the fact they farm Linux support off to rocketboards is quite telling (ie. Altera don't care much about the soc market).

    Fpgas are good at number crunching, cpus good at control.
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Thanks Tricky! I'm so thankful for all the comments. I'm taking the Qsys and ARM training classes from Altera this June and I'll ask the instructor these questions and comments.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    --- Quote Start ---

    The soc thing is nothing new. People have been using processors (power pc, arms, x86 etc) alongside fpgas since the start of fpgas. Xilinx have had hard core cpus in their fpgas for at least 10 years (power pc, now arm), so altera are only now just catching up with Xilinx (10 year lag). Altera have really missed the boat on this, and the fact they farm Linux support off to rocketboards is quite telling (ie. Altera don't care much about the soc market).

    Fpgas are good at number crunching, cpus good at control.

    --- Quote End ---

    I've noticed that the activities both here on this forum, as well as on rocketboards, is far less then what I'm used to with other development communities. I have a handful of unanswered posts both here and on rocketboards, which I find unfortunate. For this type of development and you're stuck, this community might not be the place to go to if you're in a hurry.

    I'm not particular familiar with Xilinx, but do they have a better development community? Since "Altera lags 10 years behind Xilinx", is the development tool for this more mature on Xilinx? From other experience in our company, Xilinx and Altera has constantly been leaping over each other. One year Altera is better, Xilinx the next. In the big picture is really does not matter which you choose.

    --- Quote Start ---

    Thanks Tricky! I'm so thankful for all the comments. I'm taking the Qsys and ARM training classes from Altera this June and I'll ask the instructor these questions and comments.

    --- Quote End ---

    There are free online training that you can sign up for. I had good experience taking a few of those and browsing through them to aquire some basic understanding before heading into the training classes. Helps to ask the productive questions to the instructor when he's there.
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    I don't really have much experience when it comes to the embedded side, but week it comes to the fpga side, altera have always had a better set of tools over Xilinx. That is changing with vivado, but it is only just catching up with the quartus toolset.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Thanks for responding to this post. All is very useful information. I posted these questions on this topic on the SOC forum but had very little response. I wonder if the Xilinx tools are better than Altera when trying to debug the FPGA side and the HPS side at the same time. My co-worker is doing an HPS application on a Cyclone V and he demonstrated how one must debug the FPGA and the HPS together. We joked that soon he will need three or four monitors to see all the debug windows.