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Altera_Forum
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16 years ago

Stratix II/III with no external oscillator

Hi

I have a Stratix II GX and Stratix III dev board setup with no external oscillator, only connections for the FPGA are the JTAG and passive serial connectors.

Does anyone have any experience with either being able to use the blaster clock (ie TCK for jtag) or a synthesized clock (ie inverter ring in the FPGA) as a signaltap clock?

I would like to be able to write something/anything to the FPGA and prove that it works using signaltap with this setup. Thanks for your help!

8 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Okay I've got to ask. Why configure the FPGA before putting it on a board?

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hi,

    Thanks for the information. The term dev board may have been misleading. I actually have a socket and clamp board made specifically for configuration before the fpga actually goes onto an actual board. As the board was designed for configuration only there are no generic I/O available for testing, and obviously no oscillator. I am trying to prove that the configuration is actually occuring correctly using any possible software method. I may just try to use jtag chain debugger to do a boundary scan but I have not tried to do that before either and cannot seem to find much documentation on actually using jtag chain debugger (as opposed to what is is capable of) I will check out the linked project.

    Thanks again!
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Jake, it looks like IrishMudder's (own?) dev board effectively has no oscillator and he wants to exercise his design via the JTAG interface.

    IrishMudder, you could try building a ring oscillator. I found this thread on this forum: http://www.alteraforum.com/forum/showthread.php?t=709.

    If you have access to a pair of spare FPGA pins you could build a simple RC oscillator. Or a crystal based one but this may take a little more experimenting.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    He said he had a dev board. Most likely he needed a clock rate not provided by the board and the board has no external clock inputs. Which dev. board are you using?

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Why would you save about EUR 3,- on an external oscillator if you are using a Stratix III device (starting at EUR 350,- or so) or, even worse, a Stratix II GX where you need a very stable, good quality clock source to drive the GX blocks?

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    JTAG clock doesn't work as acquisition clock, because it's not continuous. A ring oscillator should basically work, the internal oscillators e.g. used for configuration interface are of the same type, also involving a considerable frequency tolerance. Although not a specified property, you can expect even an unlocked PLL to produce an usable output frequency.