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Altera_Forum's avatar
Altera_Forum
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16 years ago

SRAM, external flash, why separate address?

Dear, in my design, why exteranl SRAM and exteranl flash can not share the same address bus?

chip: cyclone II EP2C35, BGA484

software: quartus II 9.0

hardware structure:

CPU -- tri state -->

--CFI controller --- external flash (512Mbits, S29GL512)

--RAM controller --- external (256kx16,SAMSUNG,KM616)

when I check the created mode in block diagram, I found SRAM and flash use two address bus and one same data bus:

address_to_the_ext_sram[18..0]

flash_ssram_tristate_bridge_address[25..0]

flash_ssram_tristate_bridge_data[15..0]

can I use "flash_ssram_tristate_bridge_address" as the address of SRAM? or shall I have to use separate address?

Thank you.

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    To share the buses, the SRAM controller must be put behind the tri-state bridge. Then if you double-click on the tristate bridge you can select which signals should be shared between the peripherals and which ones shouldn't.