small boot copier for EPCS

AFAIK AN458 applies both to cfi flash and epcs.

Moreover the AN comes with a design example including bootloader source code and makefile to compile it.

Hi Cris72,

Thank you very much for you reply. I guess I miss-understand the source code of small_boot_copier.s.

Besides, I think if I don't have the header in the image file, I can skip the header check by comment the following code directly:

// Check the boot image signature

nextpc return_address_less_4

br read_32b_from_flash

mov temp_data, return_value

movhi expected_value, %hi(VALID_BOOT_SIGNATURE)

ori expected_value, expected_value, %lo(VALID_BOOT_SIGNATURE)

bne temp_data, expected_value, error

// Now we can begin copying the boot record to RAM. This loop

// reads each individual record in the boot record, and copies it

// to the appropriate location in RAM. If the record is a JUMP

// record, the loop breaks and branches to the address indicated

// in the JUMP record.

// Increment flash_ptr by 28 to skip past the boot image header and into

// the real boot record (we already incremented it by 4 when we read the

// signature)

//

// You may wish to do more with the header information than just skip

// past it. If so, this is the place to do that.

addi flash_ptr, flash_ptr, 28

Am I right?

Thanks again.

Derek

If indeed your application image does have a header I don't think it would be a good idea to skip the signature check.

You may need to change the VALID_BOOT_SIGNATURE parameter and recompile.

If the header block has not been included in the image, I guess it's ok commenting out the code you quoted.

In any case you must update FLASH_BASE and BOOT_IMAGE_OFFSET parameters according to your design,

otherwise the image won't load.

Hi Cris,

When I try to make the small_boot_copier, it always halt after echo "compiling to obj / small_boot_copier.elf". And after I key in "Ctrl+C", the programmer goes on, but this hex file doesn't work.

I am using Quartus 13.1 with NIOS2 command shell [gcc4]. The command elf2flash can work only when I start the shell from Qsys->tool. But this shell also halts when I make the small_boot_copier.

I am puzzled with this issue. Could you please give me some suggestion?

Thank you very much.

Derek

http://www.alteraforum.com/forum/attachment.php?attachmentid=9794&stc=1

What's your OS?

If you are using Win8 probably this thread can help you:

http://www.alteraforum.com/forum/showthread.php?t=43526

I also noticed that you installed Quartus on disk D. Could be this the reason the shell commands don't work in some cases?

Hi Cris,

Thank you very much for your quickly reply.

I still doubt whether the small_boot_copier.s can be used for EPCS. Because at the head of this file defines:# define BOOT_IMAGE_ADDR ( FLASH_BASE + BOOT_IMAGE_OFFSET )

I guess this code can't work for EPCS, am I right? If so, do you have some example how to generate the small_boot_copier for EPCS?

I also tried to use the advanced boot copier. But I am using Quartus 13.1 in windows 7 (64), and I can generate the elf file only with the Nios2 SBT. I am not familiar with the linux style and don't know how to merge the example to my own hardware. Could you please help me?

Thanks again,

Derek

I don't use this boot loader, but I'm almost sure it works for epcs, too.

FLASH_BASE is the base address of the EPCS (or any cfi flash) as defined in Qsys.

BOOT_IMAGE_OFFSET is the position of the Nios firmware in the image you store in epcs.

You should have the fpga hw image at epcs address 0. The image size is usually fixed for a specific fpga device; let's say size=0x174500.

Then you can conveniently place the Nios sw at address 0x180000 and this is the value you must pass into the BOOT_IMAGE_OFFSET parameter.

Upon board reset, the fpga will load from epcs address 0. Then the boot copier will instruct Nios to load the firmware starting from epcs address 0x180000.

Please pay attention to these requirements, otherwise you could not boot from epcs, even if you succeed in compiling the boot loader:

- in Quartus settings, epcs pins must be configured to be used as general purpose I/O, otherwise Nios can't use them to access epcs

- the generated hex file of the boot copier must be associated to the epcs component, i.e. in Qsys you must refer to it as epcs memory initialization file

- after you compile the boot copier code, you must rebuild the Quartus project (actually you only need to rebuild the memoy initialization files)

Hi Cris,

I think I have maken some progress. I forget to associate the hex file to the boot_rom in the Qsys, because the AN458 doesn't tell me to do it. I also managed to compile the small_boot_copier.s with Quartus 11.0.

Now, the performance of my board is. The hw boot normally, then the sw image is copied. Then the hw lost. I checked the binary file of the my sw, and I found the destination address(2nd 4 bytes) is set to 0x1000, which is the cpu address.

I have checked the bin file of the sw before, the destination address is set to 0x200020.

My nios address is:

cpu 0x1000

sram 0x200000

boot_rom 0x1c00

epcs 0x0

I also set the reset_vector to 0x1c00, and exception vector to 0x200020.

In Nios2 SBT, the bsp editor showes all the linker section are pointing to sram, except .entry to boot_rom.

Do you know where to set this destination address?

Thank you very much. Please forgive me for my bad english.

Derek

What do you mean with cpu address? The cpu is a bus master, then it doesn't have an address!

Do you mean the address of the jtag debug module?

reset_vector and exception_vector are ok. Anyway I wonder why you are using an additional boot rom: epcs device already includes onchip ram to store the boot code.

So you'd better place here your boot copier hex and set reset_vector to epcs base address.

Yes, the 0x1000 is the jtag address.

Could you please tell me how to put my hex file into the ocram inside epcs?

Thank you very much.

Derek