I don't use this boot loader, but I'm almost sure it works for epcs, too.
FLASH_BASE is the base address of the EPCS (or any cfi flash) as defined in Qsys.
BOOT_IMAGE_OFFSET is the position of the Nios firmware in the image you store in epcs.
You should have the fpga hw image at epcs address 0. The image size is usually fixed for a specific fpga device; let's say size=0x174500.
Then you can conveniently place the Nios sw at address 0x180000 and this is the value you must pass into the BOOT_IMAGE_OFFSET parameter.
Upon board reset, the fpga will load from epcs address 0. Then the boot copier will instruct Nios to load the firmware starting from epcs address 0x180000.
Please pay attention to these requirements, otherwise you could not boot from epcs, even if you succeed in compiling the boot loader:
- in Quartus settings, epcs pins must be configured to be used as general purpose I/O, otherwise Nios can't use them to access epcs
- the generated hex file of the boot copier must be associated to the epcs component, i.e. in Qsys you must refer to it as epcs memory initialization file
- after you compile the boot copier code, you must rebuild the Quartus project (actually you only need to rebuild the memoy initialization files)