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Altera_Forum
Honored Contributor
15 years agoShared Bus Memory Interface with Cyclone 3
Hi,
I need to interface SRAM and Flash memory with cyclone 3 fpga.In that i am planning to use shared address bus and data bus for SRAM and FLASH Memory to commmunicate with fpga. Is it Possible? IF it possible what are all the things i have to taken care.;)Thanks in advance.;)6 Replies
- Altera_Forum
Honored Contributor
thank you cris:)
- Altera_Forum
Honored Contributor
Hi Shahul,
SRAM and flash can share the same pins for data, address, rd and wr. The sopc tristate bridge will generate separate chip select control signals for the two devices. Cris - Altera_Forum
Honored Contributor
Hi Daixiwen,
How about their control signal .All those signal should be seperate or can we mux few signals? could you please suggest me any document regarding this? Regards, Shahul - Altera_Forum
Honored Contributor
No need for any protection, just connect both components to the same bus.
- Altera_Forum
Honored Contributor
If show , can i use same pin number for connecting sram and flash memory to cyclone 3 fpga in my schematics? In that case ,is it necessary for any terminting resistance or some other protection circuit to use?
Thanx for your quick response. - Altera_Forum
Honored Contributor
With SOPC builder you can use a tristate bridge, that is designed to connect the FPGA to one or several devices sharing an address and data bus.