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Altera_Forum
Honored Contributor
15 years agoShared Bus Memory Interface with Cyclone 3
Hi, I need to interface SRAM and Flash memory with cyclone 3 fpga.In that i am planning to use shared address bus and data bus for SRAM and FLASH Memory to commmunicate with fpga. Is it Possible?...
Altera_Forum
Honored Contributor
15 years agoHi Daixiwen,
How about their control signal .All those signal should be seperate or can we mux few signals? could you please suggest me any document regarding this? Regards, Shahul