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tato_pt's avatar
tato_pt
Icon for New Contributor rankNew Contributor
6 months ago

Reset offset for Cyclone 10 GX 085

Hello! I have in my system a Cyclone 10 GX 085 FPGA (10CX085YF672I6G) and connected throught the Active Serial interface (4x) to a Winbound W25Q256JW device (256 Mbit). If I use the reset vector (s...
Configuration
Programmable Logic Device
FakhrulA_altera's avatar
FakhrulA_altera
Icon for Regular Contributor rankRegular Contributor
6 months ago

Hi tato,

 

You’re seeing two separate issues:

  1. BSP @ 0x02000000 fails because Nios V requires the reset vector to be exactly the base of the chosen reset memory region (your GSFI avl_mem base not equal to 0x02000000). Refer :5.10. Summary of Nios V Processor Vector Configuration and BSP Settings
  2. JIC packaging @ 0x02000000 fails because the first 32 bytes there are reserved (Option Bits), so app.hex starting at 0x02000000 may overlaps. 

Could you try:

  1. If GSFI base is 0x01000000, start HEX at 0x01000000. Refer :5.10. Summary of Nios V Processor Vector Configuration and BSP Settings
  2. If you must use 0x02000000, start HEX at 0x02000020 to avoid the Option Bits area. Verify with the generated .map and avoid HEX overlap errors. Refer: 2.3.1.4.3. Defining Address Span Extender Linker Memory Device
     

Also, make sure GSFI parameters match your flash and configuration mode. Refer: Nios® V Boot Option

Regards,
Fakhrul