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raulp
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1 month ago
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MAX 10: Can an ASx1 RBF be written directly to internal CFM via on-chip flash Avalon-MM?

Hi, I am implementing an in-system self-update mechanism for an Intel MAX 10 FPGA (10M16SAU169I7G) and I would like to confirm the correct configuration image format for programming the internal CFM...
  • FakhrulA_altera's avatar
    23 days ago

    Hi raulp,
     

    MAX 10 CFM can be updated from user logic through the On-Chip Flash IP, but an ASx1 .rbf is not the recommended direct-CFM image. Generate the MAX 10 Raw Programming Data (.rpd) through Convert Programming Files, and use the .map file to identify the correct CFM data and address. Do not write the complete RPD blindly from address zero because it may contain ICB, CFM, and UFM data.


    The update sequence should include erase/unprotect, status polling, the required per-byte bit reversal, and readback/CRC verification. For dual configuration, preserve CFM0 as the factory image and update CFM1/CFM2, then use the Dual Configuration IP to reconfigure.


    The I2C Slave-to-Avalon-MM Master Bridge is not needed if UART/user RTL already provides an Avalon-MM master. It is required only for an external I2C-controlled update path.


    Please use AN 741, Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor, as the primary reference and validate the exact device configuration and CFM addresses on a spare board first.


    Regards,
    Fakhrul