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Altera_Forum
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13 years ago

question about propagation delay of basic logical gates in IC

Hi guys, Is anybody know the delay for AND2, OR2, NOT and D flip-flop based on the popular fabrication technique? and suppose the delay for an AND2 gate is unit 1, what about the delay for AN...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

For FPGAs the delays for simple functions (ones that fit into a lookup table) should be similar. For example AND2 and OR2 fit within a single LUT and so the delay should be the same. The delay for AND3 and AND4 will be the same as AND2 because those functions (3 and 4 input) still fit within a LUT. The total delay is a result of the place and route too so there is no simple answer for that one.