Forum Discussion
Occasional ContributorQuartus 18.1 - CYCLONE V Preloader issue
Hi
Am working on a project with CYCLONE V - 5CSXFC6D6F31C8N with Quartus 18.1. After compilation in emif.xml file in the hand off folder the SDRAM related clock info is being written as 0 by quartus. The preloader doesn't work therefore.
We had to manually set the value to make it work. But not sure this is the best value. Please suggest appropriate values for these.
Our EOSC input for HPS is 25MHz. We are not using f2h_sdram_ref_clk. Memory clock frequency is 300 MHz.
Best Regards
Syam
25 Replies
aikeuRegular Contributor
Hi syam,
I cant be sure regarding most of the parameters at the moment.
Does the specic values for DDR clock 118MHz relected in the emif.xml file?
I see that your F2S_SDR_REF clock is 0 KHz even you have set to 50Mhz, I think is because the bridge was not enabled yet.
When in u-boot, you can run the cmd "bridge enabled" and if possible check any changes to the F2S related clock values.
Thanks.
Regards,
Aik Eu
syamHi Aik
Thanks for the response. 118MHz is not reflected in the emif.xml file.
The boot log is from the preloader before u-boot.img is loaded. So am not sure how to do the bridge-enabled stuff. Can you please share the procedure to do so.
Best Regards
Syam
- aikeu
Hi syam,
Sorry for late reply.
I was not able to find out why the preloader fail due to certain parameters value being used. I suspect is due to the hardware difference of ddr3 being used.
I noticed the quartus version after 18.1 is using the default values as below:
You can try to work with those default values.
These values are found in the hidden parameters in of the HPS IP. You can try right click on the blue gradient in the UI pic above to display the hidden parameters. The parameters in the emif.xml is auto generated based on these settings.
Thanks.
Regards,
Aik Eu
- syam
Hi
The image you have sent cannot be opened.
There is definitively a problem with the preloader generation. I set the clock for the DDR3 from the FPGA at 50Mhz. But the preloader bootloader shows 0.
- aikeu
Hi syam,
Sorry that I am not aware the image is not able to open in the community forum page. I was using another link to upload the image.
Below is the image, refer to the default values of the IP:You can try to check the hidden parameters of the IP in platform designer to verify again the difference before and after generate.
The hidden parameters can be displayed when right click on the blue gradient part of the pic above.
Thanks.
Regards,
Aik Eu
- syam
Hi
Any update on this ?
Regards
Syam
