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Altera_Forum
Honored Contributor
15 years agopulse generation with de0 nano
hi, there,
i just received the nano board for my lab work. this is my first time touching this fancy board. what i wanna is a output 500ms pulse whose duty cycle is 1/60 (30s per cycle). i am totally no idea from where to get a start. the pulse amplitude i need is above 3V. could any one give me any instruction for my task? Thanks.16 Replies
- Altera_Forum
Honored Contributor
--- Quote Start --- i just received the nano board for my lab work. this is my first time touching this fancy board. what i wanna is a 500ms pulse whose duty cycle is 1/60 (30s per cycle). i am totally no idea from where to get a start. the pulse amplitude i need is above 3V. could any one give me any instruction for my task? --- Quote End --- The pulse can be generated using counters, or a reloadable counter with selectable input count. The counter could be controlled by a small finite state machine. I've built designs like this for generating pulses relative to a 1pps (pulse-per-second) GPS pulses. I would assume the DE-nano have 3.3V output pins, so that will satisfy your pulse voltage amplitude requirement. Is the pulse generator just supposed to start and run whenever the FPGA is loaded, or will it be externally triggered? Will it need control registers, eg., to enable output pulse generation? How accurate does the timing of this pulse need to be, i.e., is the oscillator on the board accurate enough, and could you tolerate jitter on the pulse edges? You could implement the design purely in FPGA logic using an HDL, or you could implement the pulse using a processor to toggle an I/O pin (which could potentially led to edge jitter), or you could use a pulse-generator component that is controlled by a processor, eg., a PWM generator peripheral. Cheers, Dave - Altera_Forum
Honored Contributor
--- Quote Start --- The pulse can be generated using counters, or a reloadable counter with selectable input count. The counter could be controlled by a small finite state machine. I've built designs like this for generating pulses relative to a 1pps (pulse-per-second) GPS pulses. I would assume the DE-nano have 3.3V output pins, so that will satisfy your pulse voltage amplitude requirement. Is the pulse generator just supposed to start and run whenever the FPGA is loaded, or will it be externally triggered? Will it need control registers, eg., to enable output pulse generation? How accurate does the timing of this pulse need to be, i.e., is the oscillator on the board accurate enough, and could you tolerate jitter on the pulse edges? You could implement the design purely in FPGA logic using an HDL, or you could implement the pulse using a processor to toggle an I/O pin (which could potentially led to edge jitter), or you could use a pulse-generator component that is controlled by a processor, eg., a PWM generator peripheral. Cheers, Dave --- Quote End --- thanks, Dave. the generator could start when fpga is loaded. and i just use this pulse to roughly trigger other device. so the accuracy and the jitter won't be a problem for me. so i just need a straightforward way to generate the pulse from the board. - Altera_Forum
Honored Contributor
--- Quote Start --- the generator could start when fpga is loaded. and i just use this pulse to roughly trigger other device. so the accuracy and the jitter won't be a problem for me. so i just need a straightforward way to generate the pulse from the board. --- Quote End --- Look at the "My First NIOS" tutorial that ships with every Terasic board. There is a PIO component used for turning LEDs on/off. Get that working, then modify the design to toggle an I/O with the timing you want. The NIOS tools most likely have a timer software interface; you could use a timer to generate the rising and falling edges, or use two timers, one for each edge. You can then look for a PWM component. I recall there being one with the BeMicro boards, perhaps the BeMicro-SDK, and use that to generate a more accurate pulse. Its not too hard to develop an Avalon custom peripheral, so you could always look at designing your own. If you get stuck ask questions. Cheers, Dave - Altera_Forum
Honored Contributor
--- Quote Start --- Look at the "My First NIOS" tutorial that ships with every Terasic board. There is a PIO component used for turning LEDs on/off. Get that working, then modify the design to toggle an I/O with the timing you want. The NIOS tools most likely have a timer software interface; you could use a timer to generate the rising and falling edges, or use two timers, one for each edge. You can then look for a PWM component. I recall there being one with the BeMicro boards, perhaps the BeMicro-SDK, and use that to generate a more accurate pulse. Its not too hard to develop an Avalon custom peripheral, so you could always look at designing your own. If you get stuck ask questions. Cheers, Dave --- Quote End --- thanks. i get the led lightening. but if disconnect usb cable and then reconnect or power it up by dc volt, doesn't it work? i am totally newbie on fpga. maybe some silly questions:confused: - Altera_Forum
Honored Contributor
The program has to be transfered to the EPSC serial flash to store it non-volatile.
- Altera_Forum
Honored Contributor
--- Quote Start --- if disconnect usb cable and then reconnect or power it up by dc volt, doesn't it work? --- Quote End --- According to the DE0-nano page, it contains an "Altera serial configuration device – EPCS16". You can use this device to program the FPGA at power-on, i.e., when you insert it into a PC, or into a USB wall-charger (which saves you having to leave your PC on). So get your design working, and then program the FPGA image onto the EPCS16. The design can contain a NIOS processor, and its code can also boot from this non-volatile memory. Cheers, Dave - Altera_Forum
Honored Contributor
--- Quote Start --- According to the DE0-nano page, it contains an "Altera serial configuration device – EPCS16". You can use this device to program the FPGA at power-on, i.e., when you insert it into a PC, or into a USB wall-charger (which saves you having to leave your PC on). So get your design working, and then program the FPGA image onto the EPCS16. The design can contain a NIOS processor, and its code can also boot from this non-volatile memory. Cheers, Dave --- Quote End --- thanks. i have done this. but in last post you said mod to toggle the pio component to adjust the pulse time. do i need to mod it on the existing files or add any new components? - Altera_Forum
Honored Contributor
--- Quote Start --- but in last post you said mod to toggle the pio component to adjust the pulse time. do i need to mod it on the existing files or add any new components? --- Quote End --- You should be able to take the existing design and modify the software. The modifications would involve using a timer to generate the pulses you want. I haven't used NIOS much, so can't comment on specifics. Read through the NIOS documentation and you should be able to find something. I'm assuming you're more comfortable starting with a software solution. If you'd prefer to go the hardware-only route, we can discuss that. Cheers, Dave - Altera_Forum
Honored Contributor
You could always take the empirical approach; put a software delay (loop) in for the low and high time of the pulse, probe the pin with a scope, and then adjust the loop times accordingly.
Cheers, Dave - Altera_Forum
Honored Contributor
--- Quote Start --- You should be able to take the existing design and modify the software. The modifications would involve using a timer to generate the pulses you want. I haven't used NIOS much, so can't comment on specifics. Read through the NIOS documentation and you should be able to find something. I'm assuming you're more comfortable starting with a software solution. If you'd prefer to go the hardware-only route, we can discuss that. Cheers, Dave --- Quote End --- i am confused on the def of software and hardware solution. do you mean i could use the tools like sopc to mod the components or what ever else? thanks for help, Dave.