Programming and booting a non-NIOS embedded apllicatio

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Hmmm.... Did you not see the SPI bootloader that is provided by Altium? It was added to the library - I believe - some time around Altium Designer 6.8 (When the NB2 was first released).

It is a simple state machine slave core to the tSK3000 (or NIOS-II) that uses a Wishbone multi-master to write the boot code from an SPI flash device to the program memory (SRAM).

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Yes, I know this module and even wanted to use it at the beginning, but afterwards decided to use SPI_WB (w/o the HW-coded booting), having implemented both programming the flash with my application and booting it to the program SRAM from within my program. Besides, I use the same flash to save and read the application's non-volatile data.

This way seemed to me to be more controllable and after all consumed less LE resources then it would be with WB_BOOTLOADER.

Valmar

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Hi,

I wonder if anybody have already tried or can share ideas how to load a non-NOIS embedded program into a configuration EPCS device or separate SPI or CFI flash by means of the Quartus/NIOS programmer (or somehow else) and how to boot this embedded non-NIOS code when powering the board on.

My interest in solving this problem has two reasons:

1) Generally, it would be very useful to know such a solution in cases of FPGA-redesigning out-dated electronics containing hard µPs for which there already exist softcore equivalents, especially when the software is complex and been written in assembler.

2) At the moment, I have to transfer to a production board one Cyclone-targeted design made in Altium Designer (AD) and utilizing the TSK3000 processor (32-bit, MISP-like) from Altium. Actually, the AD IDE calls Quartus for synthesis getting back all configuration (and report) files including .pof, .sof, .jam etc.

The embedded tool chain of the AD IDE generates output files in .elf, .sre, and .hex formats.

From within AD IDE, I can load my configuration data into the target Cyclone FPGA on the production board using the Altium NB1 development board we have and the JTAG connection between the boards. But it is apparently impossible to load the Cyclone configuration as well as the processor program code into any flash memory to use for power-on or reset booting. Altium's technical support was not able to give any useful advise on my request regarding this issue, just promised to study it and answer.

Meanwhile, by means of the Quartus programmer (in JTAG mode) and the USB Blaster cable, I have fairly easily managed to program my configuration data into the EPCS4 device, which is done by making use of the Altera Serial Flash Loader megafunction.

But writing the embedded code into the EPCS device or another flash memory and (especially) booting it into SRAM seems to me to require more complex and tricky solutions.

I think, and I have proved it already (maybe I am wrong) that the NIOS programmer cannot be used in this case.

The reason apparently is that it uses the EPCS controller, that is absent in my design, so I get a message like “no NIOS processor in design”.

Currently I am going to further deliberate as possible solutions :

- altasmi_parallel megafunction controlled by the TSK3000 processor to load the program code into an EPCS memory. I can instantiate the altasmi_parallel megafunction in my design.

- some SPI (maybe CFI) flash controller which is controlled by the TSK3000 and loads the program code into a SPI/CFI flash.

In both cases a corresponding bootloader has to be developed for the TSK3000. For that, the NIOS II bootloaders source code might probably help a great deal. In application note AN 458, “Alternative Nios II Boot Methods“ an advanced boot copier example is described written in C with this link to the design files (citation):# a hyperlink to the design files appears next to this document on the Nios II literature page. Visit www.altera.com/literature/lit-nio2.jsp.# Unfortunately I didn’t find anything of the sort there. Does anyone have the package or correct link to download it?

Any experience or ideas how to solve the described task?

Valmar

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Hmmm.... Did you not see the SPI bootloader that is provided by Altium? It was added to the library - I believe - some time around Altium Designer 6.8 (When the NB2 was first released).

It is a simple state machine slave core to the tSK3000 (or NIOS-II) that uses a Wishbone multi-master to write the boot code from an SPI flash device to the program memory (SRAM).

Hi,

I have recently solved the problem I put to discussion in this thread, though meanwhile without using an Altera configuration EPCS device.

Because of lack of time for the project, it turned out to do it quicker with a separate SPI flash device serving only for booting the application code, while the EPCS flash is used only for the FPGA configuration as before.

I just took an Altium SPI core with the wishbone interface which is directly connectable to the TSK3000 processor having the same interface. Of course, I had to code the flash driver as well as procedures for writing to the flash and booting from it.

As to utilising the EPCS controller (with the configuration flash) for this purposes, it would have been to me much more time-consuming, since its description is very brief to allow writing drivers for different processors than NIOS. There's, though, a source code of Altera's driver for the EPCS controller in Quartus, but it is in NIOS assembly language and its reengineering for another processer would require time.

valmar

Thanks Jake. Now I seem to understand you approach completely and enough in extenso to try to apply it for resolving my problem.

I have already generated a dummy NIOS+EPCS design and get it synthesized.

Tommorow I will try to program with its help my TSK3000 code into the EPCS device, and then modify the EPCS so that it matches the Wishbone interface of the TSK3000 and its ROM block gets initialized with my bootloader.

Hope I have not missed anything important. I will report my achievements or come up with further questions that may occur.

Valmar

So for loading the code into the EPCS.

1 - You can use the Quartus programmer to do this.

2 - You could use the nios2-flash-programmer but you would have to create a dummy firmware project that just had a NIOS II processor and the epcs controller. So to program data into the flash, you would have to load your dummy firmware image then run the programmer.

3 - You could use your own method for programming the EPCS flash using your TSK3000 processor.

For my projects, in manufacturing I use JTAG to program an image into the FPGA. I then either

a) use the nios2-flash-programmer

b) transfer data over ethernet and program the EPCS flash using my own methods.

Jake

Apparently, Altera's elf2mif and elf2hex converters would be the quickest way to do that.

Yes, "EPCS" is just Altera's term for an SPI flash connected to the FPGA's dedicated configuration pins.

Yet one question I'd like to bring up to discussion is loading the embedded program code into the EPCS device. Is there any way to apply the NIOS programmer for this purpose, or it's better to do from out my program, or maybe there are other reasonable ways?

Valmar

Apparently, Altera's elf2mif and elf2hex converters would be the quickest way to do that.

Yes, an EPCS is just Altera's term for an SPI flash connected to the FPGA's dedicated configuration pins.

Yet one question I'd like to bring up to discussion is loading the embedded program code into the EPCS device. Is there any way to apply the NIOS programmer for this purpose, or it's better to do from out my program, or maybe there are other reasonable ways?

Valmar

3 - The ELF needs to be converted to a MIF or HEX file. There are tools for doing this if you get to that point.

It should be noted that the EPCS device is nothing more than an SPI flash. In fact you can directly replace it with compatible SPI flash devices.

Jake

Jake,

thank you once again. Now I've got a much better insight in your idea.

Here's my understanding of your approach in form what I shall do with estimation how it might be complex or easy for me to implement:

1) adapt the APCS component from you to interface to my processor. I see no problem with it. As I understand, there's no need to change the EPCS interface of the core, if I use a standard Altera device;

2) modify my bootloader to make it able to copy the program out of the EPCS in the SRAM. Currently it can boot only from an SPI-Flash hooked up on five standard IO-pins of the FPGA. Here I fill a need to study more in-depth what and to what to change.

3) Use the changed and compiled bootloader as a .mif for the ROM block in the EPCS.

What file shall I take for that - the executable .elf? No special tricks or actions else?

Valmar

There is no precompiled code in the EPCS controller to boot the NIOS processor. The module I sent you Instantiates a ROM in the first 1024 K of address space. The bootloader gets loaded into this ROM at compile time.

You don't have to use this method at all. Take the component I gave you and modify it to just instantiate what is needed to interface to the EPCS flash and your processor.

Then boot however you want. Where do you put your bootloader now? It has to exist somewhere right? All you have to do is modify your bootloader to copy the code out of the EPCS flash and put it in RAM. You can look at the assembly source code for Altera's bootloader for help or use the document you referenced "Alternative Boot Methods ..."

On my current project, I continued to use the ROM block inside the EPCS controller for my boot code. But I wrote my own bootloader and used Quartus to specify my compiled bootloader as the memory initialization file for the ROM in the EPCS controller.

Jake