Honored Contributor
Honored ContributorI don't remember how the tristate master works, but I think you can configure it so that it shares the output enable between the flash and the ssram, so that you have only one signal to connect.
As for the other ones, I don't know which mode the ssram controller uses, but you could at first try not to connect them. Just ensure that the two individual byte write enable signals are well connected, and then you can forget about the global write. Don't you have a design example you can have a look to, so that you can see how it was implemented?
