Migrate from Cyclone V dev kit.

Almost certainly - Yes. You are going to need to re-assign all the I/O pins unless you've used the same device, package and pinout.

There are device migration routes which allow you to change device but they are always in the same package.

What two devices are you looking at (on the dev board and for your design)?

Cheers,

Alex

Hi Alex.

Thanks for answer. So i am use dev kit with 5CGTFD9 F35 pack, and want migrate to 5CGTF D5 F23 pack.

In all cases before compile project for F23 pack i am remove assigments and look to result - after compile its looks not bad. One pin DQ[13] have not correct placement, dq[0]-[12] fine - i am check pin outs files and look to HMC part in this table.

And next problem - diff pair pins - ALL inverted. EXACTLY clock_p after compile placed to clock_p(n).

Thank you for understand.

It sounds like you are doing the right thing. Yes, you will definitely need to assign (or accept) pin locations changing between the two packages.

The P/N swapping sounds very strange - the tools are very good at identifying P/N correctly. How is this coded? I'm concerned how your design is captured and why Quartus wants to do as you suggest. Posting your top level design would help.

Cheers,

Alex

So i am think better looks to screenshots.

Basicly i am use for debug 5CGTFD9 F35 this is standart chip for Cyclone V dev kit. And for understand full line my question looks to this:

step 1. Ref design project scat/gat dma for pcie gen2. (warning! - in this case - "zero changes" only compile ref design) P/N FPGA for design 5CGTFD9 F35

compile / program / try - its work!

step 2 We are ready to prototype and use cheap C5GTD5 only in package F23 (484 pins fbga).

And i am simply in my quartus change device to C5GTD5С5F23, say YES about remove pin assign from project.

Comple - succefull ! Great - look to result.

Fitter location for one pin have error. looked please. normally in pinout its C8 !

About inverted diff pairs i am double check.

I sorry, but I don't fully understand your explanation...

--- Quote Start ---

step 1. Ref design project scat/gat dma for pcie gen2. (warning! - in this case - "zero changes" only compile ref design) P/N FPGA for design 5CGTFD9 F35 compile / program / try - its work!

--- Quote End ---

Step 1 is all OK?

--- Quote Start ---

step 2 We are ready to prototype and use cheap C5GTD5 only in package F23 (484 pins fbga). And i am simply in my quartus change device to C5GTD5С5F23, say YES about remove pin assign from project. Comple - succefull ! Great - look to result.

--- Quote End ---

Is this all OK too?

--- Quote Start ---

Fitter location for one pin have error. looked please. normally in pinout its C8!

--- Quote End ---

If you've removed all the pin assignments when you changed package, I don't understand why this is an error. Are you letting Quartus pick the pinout or have you assigned a new pinout?

If you are designing a new board I recommend you let Quartus choose the pinout first. If routing the board is difficult you can try swapping pins around to help. However, always use Quartus to check that whatever pin swaps you do still work before having the PCB made.

Cheers,

Alex

a_x_h_75

Error on ONE pin, after remove all assigments and run compile - result for HMC controller have problem.

if look to pinout file for package F23 HMC pin for DDRA_[13] = C8 , in quartus its pin = R3 !

And i am not understand What.