Honored Contributor
Honored ContributorI sorry, but I don't fully understand your explanation...
--- Quote Start --- step 1. Ref design project scat/gat dma for pcie gen2. (warning! - in this case - "zero changes" only compile ref design) P/N FPGA for design 5CGTFD9 F35 compile / program / try - its work! --- Quote End --- Step 1 is all OK? --- Quote Start --- step 2 We are ready to prototype and use cheap C5GTD5 only in package F23 (484 pins fbga). And i am simply in my quartus change device to C5GTD5С5F23, say YES about remove pin assign from project. Comple - succefull ! Great - look to result. --- Quote End --- Is this all OK too? --- Quote Start --- Fitter location for one pin have error. looked please. normally in pinout its C8! --- Quote End --- If you've removed all the pin assignments when you changed package, I don't understand why this is an error. Are you letting Quartus pick the pinout or have you assigned a new pinout? If you are designing a new board I recommend you let Quartus choose the pinout first. If routing the board is difficult you can try swapping pins around to help. However, always use Quartus to check that whatever pin swaps you do still work before having the PCB made. Cheers, Alex
