Forum Discussion
FvM
Super Contributor
1 month agoHi,
differences between low- and high-speed IO banks only apply to LVDS and DDR IO standards. 100 MHz SPI will presumedly use single-ended IO and isn't restricted to specific banks.
Regards
Frank
Aaron
New Contributor
1 month agoHi Farabi,
But in pin out file, the pins are still divided into low-speed and high-speed categories.
So have any MAX10 single end signals frequency limit or performance data?
Thanks.
Best Regards,
Aaron Hsu