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patrick03
New Contributor
New ContributorMax10 FPGA Programming with .pof file
Hello All, we are using 10M16 FPGA in our design. Observation is that we are able to program the FPGA using .sof every time but .pof gets installed on most boards 8/10 times and on few boards fails ...
patrick03New Contributor
New ContributorHello Frank,
Appreciate your quick response. Out of few possible trials I remember we did reduce the JTAG clk (Default 24MHz) to ~10Mhz. I will retry with even lower clk and with a capacitor. Will revert shortly. Thank you.
FakhrulA_altera
Regular Contributor
Regular ContributorAs we haven't received a response to our previous notification, this thread will be transitioned to community support. We hope all your concerns have been addressed. If you have any new questions, please feel free to open a new thread to receive support from Altera experts. Otherwise, community users will continue to assist you here. Thank you.
