MAX 10 Flash programming

A little bit of overview info here, in chapter 2: https://www.altera.com/literature/ug/ug_usb_blstr.pdf

/* The following code doesn't fully utilize the possibilities of the
 * USB-Blaster. It only buffers data up to a maximum packet size of 2 bytes.
 * The normal maximum packet size is up to 64 bytes (but would require a
 * major change to the logic of this program).
 *
 * Actually, the USB-Blaster offers a byte-shift mode to transmit up to 504 data
 * bits (bidirectional) in a single USB packet. A header byte has to be sent as
 * the first byte in a packet with the following meaning:
 *
 *   Bit 7 (0x80): Must be set to indicate byte-shift mode.
 *   Bit 6 (0x40): If set, the USB-Blaster will also read data, not just write.
 *   Bit 5..0:     Define the number N of following bytes
 *
 * All N following bytes will then be clocked out serially on TDI. If Bit 6 was
 * set, it will afterwards return N bytes with TDO data read while clocking out
 * the TDI data. LSB of the first byte after the header byte will appear first on TDI.
 */
/* Simple bit banging mode:
 *
 *   Bit 7 (0x80): Must be zero (see byte-shift mode above)
 *   Bit 6 (0x40): If set, you will receive a byte indicating the state of TDO in return.
 *   Bit 5 (0x20): Output Enable/LED.
 *   Bit 4 (0x10): TDI Output.
 *   Bit 3 (0x08): nCS Output (not used in JTAG mode).
 *   Bit 2 (0x04): nCE Output (not used in JTAG mode).
 *   Bit 1 (0x02): TMS Output.
 *   Bit 0 (0x01): TCK Output.
 *
 * For transmitting a single data bit, you need to write two bytes. Up to 64
 * bytes can be combined in a single USB packet.
 * It isn't possible to read a data without transmitting data.
 */

It generates the programming signals (JTAG or PS) based on the data from the FTDI device.

May I know what is the purpose of CPLD ? It would be great if anyone clarifies my doubt.

Okay. Thank you Alex.

Yes. The CPLD is essential. The unpopulated header is for programming it. What's programmed into it is a closely guarded Altera secret. Don't expect to be able to replicate it.

The header is placed between FTDI and CPLD (USB Blaster circuit). What is the purpose of that header ? please clarify.

Thank you FvM and Alex.

You program the CFM via JTAG. You can't program the internal FLASH directly from other pins. So, an FDTI device won't help you.

Without specific logic implemented in the MAX10, JTAG is the only interface available for flash programming. Quartus only supports flash programming through Altera programming adapter, but it's possible to use generic JTAG programming files with third party tools. Some may be able to implement a JTAG programmer through FTDI USB adapter.

Actually, I'm planning to use USB (via FTDI) to program the internal flash. I am confusing with how data and control signals are connected in between FTDI and FPGA to program the CFM.