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Altera_Forum
Honored Contributor
11 years agoMatrix Package in VHDL
Hello, I have found that there is matrix package provided by Altera which includes several functions that we can perform on matrices. Anyone who has already used this package?? Since I am creating matrices in fixed_package format and this package also supports the functions for matrices created in fixed format, i just want to confirm that whether should i use it or not??
9 Replies
- Altera_Forum
Honored Contributor
Which package is this?
I have never seen such a package created by altera - link? - Altera_Forum
Honored Contributor
--- Quote Start --- Which package is this? I have never seen such a package created by altera - link? --- Quote End --- Sorry for misinformation..I am not sure whether the package is created by altera or some one else. howver, you can look at the package...I have uploaded it...can you tell me whether it will work for or not???? - Altera_Forum
Honored Contributor
This package is for modelling only. You cannot synthesise with this package.
- Altera_Forum
Honored Contributor
--- Quote Start --- This package is for modelling only. You cannot synthesise with this package. --- Quote End --- Why this package won't synthesis??? Even if I use fixed values for my matrices? - Altera_Forum
Honored Contributor
This package uses real types.
You could use the integer matrices, but the real matrices are not suitable (real types have no meaning to a synthesisor) You need to define your own types , in your own package, with the fixed point package. - Altera_Forum
Honored Contributor
--- Quote Start --- This package uses real types. You could use the integer matrices, but the real matrices are not suitable (real types have no meaning to a synthesisor) You need to define your own types , in your own package, with the fixed point package. --- Quote End --- I have written the following code and compiled it with Quartus II. It gave me no error... I have also attached the snapshot of compilation page. I think I should use it and see whether I can achieve my result or not. What you suggest? entity matrix_multiply is port ( clock : in std_logic ); end matrix_multiply; architecture matrix_function of matrix_multiply is signal i_es_alpha : sfixed(15 downto -12); begin multiply: process (clock) variable matrix_a : sfixed_matrix (0 to 1, 0 to 1); variable matrix_b : sfixed_matrix (0 to 1, 0 to 1); variable matrix_c : sfixed_matrix (0 to 1, 0 to 1); variable resizing : sfixed (15 downto -12); begin if rising_edge(clock) then matrix_a := ((to_sfixed(1,15,-12),to_sfixed(2,15,-12)),(to_sfixed(5,15,-12),to_sfixed(8,15,-12))); matrix_b := ((to_sfixed(5,15,-12),to_sfixed(2,15,-12)),(to_sfixed(7,15,-12),to_sfixed(8,15,-12))); matrix_c := matrix_a*matrix_b; end if; i_es_alpha <= matrix_c(1,1); end process multiply; end architecture matrix_function;https://www.alteraforum.com/forum/attachment.php?attachmentid=10580 - Altera_Forum
Honored Contributor
input : clk
output: nothing that makes compilation very easy and empty. BTW this forum website is badly broken , it took me 4 times to login in order to login...not very encouraging. - Altera_Forum
Honored Contributor
Hi,Do you have seen this prob: Could not find the package (mgc_axi4_pkg)
- Altera_Forum
Honored Contributor
mgc_axi4_pkg will be a custom package you need to compile and load with your design.