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Altera_Forum
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14 years ago

Main clock voltage levels for Cyclone III

Hello!

I have developed a custom board using a Cyclone III and (surprise) it isn't working. My design is based on another similar design that is known to work, so I don't think I'm too far off. I suspect my main clock voltage levels could be a problem. I haven't been able to find any information so far on what acceptable voltage levels are for the clock, even on the data sheet. I'm hoping someone here knows what acceptable voltage levels are for the high and low points of the clock signal for the Cyclone III.

I am using a 48 MHz crystal oscillator to generate the main clock. The lowest voltage reached is 1.2V and the highest is 2.2V.

Is a 1.2V DC offset too much? Is the peak to peak voltage sufficient?

Thanks,

LH

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Hi,

    I Think Cyclone require a clock having voltage level between 0v and 3.3v. It also depend on the I/O level set for the device, i.e. Voltage provided at "vccio" pins of the Altera Device.

    --

    Regards,

    Chander
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Thanks Csrana. VCCIO is 3.3V in my case. I have a reference design here that works well with a clock that oscillates between 1V and 2.2V. However, it is possible that such a clock is considered marginal, and moving the low end up to 1.2V could be a problem. Or perhaps it is not a problem. I'm trying to remove the uncertainty.

    Other circuit constraints have made it very difficult to improve the clock further and I'm working under time pressure, which is why I am seeking guidance on whether I should invest the time in strengthening the clock signal or if I should look to other causes for being unable to communicate with the Cyclone.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Well, turns out the primary reason my board doesn't work is because the manufacturer failed to reflow the FPGA; the solder balls are still solder balls floating above the pads on the board. Now off to fix that... :)

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Hi, I am a rookie and also is a student. I also met the same problem in my projcet. my chip is cyclone II,and it does not work now.The crystal is 50MHZ, but its output is also 1.2v-2.2v.

    Here is the first question. Second, when i download the program with a usb-blaster by quartusII ,it shows the error"CAN'T access the JTAG chain" Did you meet the same problem during the work? and may i know how you solve you problem finally?
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    We haven't solved the problem yet, but we found that due to manufacturing defect our Cyclone III was not soldered to the board. We confirmed this by using a microscope to inspect the edges of the device where we could see that the BGA balls were not touching the pads under them. It is possible that the bottom end of the clock signal will be closer to GND once it is actually connected to the FPGA, but we won't know until we manage to get another board made.

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Thank you ! I will go back to check the board's solder, and maybe consider to make a new board.