Forum Discussion
benstrawbridge
New Contributor
1 month agoAlso if possible we would want the pin delay information to support DDR layout. this may be in an available document but I haven't found it yet!
- FakhrulA_altera1 month ago
Regular Contributor
Hi Ben Strawbridge,
You look into this page : Quality & Reliablity
Regards,
Fakhrul- benstrawbridge1 month ago
New Contributor
Hello, I have already looked at the drawing that is available.
- FakhrulA_altera1 month ago
Regular Contributor
Hi benstrawbridge,
Could you try check the following. I attached here for two package codes R24C & R24D for Drawing No.M67981:
Intel Agilex® 7 F-Series Device Allegro* PCB Footprint for R24D (2340D) Package - PRELIMINARY
Intel Agilex® 7 F-Series Device Allegro* PCB Footprint for R24C (2340A) Package - PRELIMINARY