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yossik's avatar
yossik
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8 months ago

LVDS SERDES rx_inclock idle

Hi, We are using LVDS SERDES IP as a multichannel LVDS receiver in Cyclone 10 GX device. The reciver is configured to run at DDR mode using 200MHz rx_inclock. The transmitter device output clock is ...
Generic Io
Programmable Logic Device
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
8 months ago

Hi,
if PLL doesn't lose lock, there's most probably no need to change anything.