Forum Discussion
AdzimZM_Altera
Regular Contributor
1 year agoHi
May I know your update on this issue?
Regards,
Adzim
DinhLe
New Contributor
1 year agoHi @AdzimZM_Intel,
1. I checked and the reset pin of DDR3 EMIF IP is not in reset state .
2. I generated example design, and there is no DQS signals.
3. I checked board user manual and pin assignment, it is matched.