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CTu001's avatar
CTu001
Icon for New Contributor rankNew Contributor
6 years ago

JIC programming process shows successful, but the FPGA Configuration Sequence looks abnormal.

Debug information:

device: 5CEFA4M13I7N

MSEL[4:0] setting: 10011

related signal observation:

  • nSTATUS is high
  • nCONFIG toggled repeatedly
  • CONF_DONE is low

By the way, what is the difference between 5CEFA4M13I7N and 5CEFA4M13C8N? In our previous design which used 5CEFA4M13C8N is without this problem.

4 Replies

  • CTu001's avatar
    CTu001
    Icon for New Contributor rankNew Contributor
    6 years ago

    Hi SooYL,

    There are TYPOs:

    """""

    related signal observation:

    • nSTATUS nCONFIG is high
    • nCONFIG nSTATUS toggled repeatedly
    • CONF_DONE is low

    """""

    The device is not configured well after JIC programming and reboot.

    By the way, SOF programming is fine.

    ​

    We have done some testing, please find more detail in the attached file.

    thanks!

    ​

  • YuanLi_S_Intel's avatar
    YuanLi_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    6 years ago
    Hi Chien-Hui Tu, nSTATUS is toggling, that means the configuration is not successful. Can you try to change the MSEL to 10010? Also, can you check if AS mode is selected in the Quartus Design? Regards, YL
  • YuanLi_S_Intel's avatar
    YuanLi_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    6 years ago
    Hi Chien-Hui Tu, Just would like to check if changing the MSEL to AS mode will resolve your issue? Regards, YL