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CTu001
New Contributor
New ContributorJIC programming process shows successful, but the FPGA Configuration Sequence looks abnormal.
Debug information: device: 5CEFA4M13I7N MSEL[4:0] setting: 10011 related signal observation: nSTATUS is high nCONFIG toggled repeatedly CONF_DONE is low By the way, what is the difference be...
YuanLi_S_Intel
Regular Contributor
Regular ContributorHi Chien-Hui Tu,
Just would like to check if changing the MSEL to AS mode will resolve your issue?
Regards,
YL
