JIC programming process shows successful, but the FPGA Configuration Sequence looks abnormal.

Hi SooYL,

There are TYPOs:

"""""

related signal observation:

• nSTATUS nCONFIG is high
• nCONFIG nSTATUS toggled repeatedly
• CONF_DONE is low

"""""

The device is not configured well after JIC programming and reboot.

By the way, SOF programming is fine.

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We have done some testing, please find more detail in the attached file.

thanks!

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