Forum Discussion
ShengN_altera
Super Contributor
3 years agoHi,
I tested the command line with no problem. SPD file is generated after running quartus_ipgenerate and there is no error with ip-setup-simulation. Could you test on the file attached? I use the following command:
- quartus_ipgenerate --generate_project_ip_files --synthesis=verilog --simulation=verilog --clear_ip_generation_dirs .../generic_flash_access_project/top --rev top1
- ip-setup-simulation --quartus-project=.../generic_flash_access_project/top --simulator=RIVIERA
Or may be you can try to specify the project path and see.
Best Regards,
Sheng
p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution and give Kudos.
grspbr
Occasional Contributor
3 years ago
Please see the attached console output from our Jenkins build. I tried your command lines and still have a problem.
Greg