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Theja's avatar
Theja
Icon for New Contributor rankNew Contributor
1 year ago

Info (332102): Design is not fully constrained for setup requirements in max10 devices

Hi , I am using max10 device with espi slave ip in my project. My resource utilization is 98% and 97% sometimes .I am using pll of clock 100MHz using for espi controller logic in the design. I have ...
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RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
1 year ago

Have you run the functional simulation and checked whether the design functions correctly?

Do you see any Unconstrained Path in the Timing Analyzer? Or any report highlighted in red in the compilation stages?


You can refer to "AN 433: Constraining and Analyzing Source-Synchronous Interfaces" to learn more about set_input_delay and set_output_delay.


Regards,

Richard Tan