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Altera_Forum
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16 years ago

Implementing Phase Accumulator in VHDL

Hi,

I am currently in the process of designing a Phase Accumulator in VHDL for Altera Cyclone 3 Family. I realise there is an NCO Mega Function in the Altera Library.

Can some one explain me the basics of Phase Accumulator design.

My understanding is the Phase Accumulator is a normal accumulator (counter) which gets incremented with a certain phase_offset value at every clock tick.

In my design I require a 32-bit accumulator which will generate a 14-bit accumulator output. I have been reading articles on phase accumulator. I still have the doubt why we use only certain number of bits from the accumulator where in actual reality the resolution is much better with all the 32 bits.(or all n bits in an n-bit accumulator).

Best Regards

Binu

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Basic NCO operation is very simple to my opinion. Actually it's essential to have a large fractional part in total accumulator bitwidth respectively resolution. Your description is fully correct, just consider a few additional facts:

    - the output resolution is the number of bits, that can be used by your design, e.g. an output DAC

    - a periodic signal is achieved by allowing the accumulator to overflow. This already clarifies, that the most significant bits form the output

    - a fractional part (the accumulator bits right of the least significant bit going to the output) are required to achieve phase/frequency resolution. You can try by pencil and paper method to generate a very low frequency with a virtual NCO.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hi FvM,

    Thanks for your quick answer :).

    I didn't understand what you meant by "a fractional part (the accumulator bits right of the least significant bit going to the output) are required to achieve phase/frequency resolution." can you please explain more elaborately?

    Best Regards

    Binu
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    the NCO is based on 3 resolutions:

    - accumulator resolution. Many designers choose 32 bits as it is cheap. This affects the addition result ofcourse. a 32 bit modulo adder keeps building up the result more correctly but never exactly.

    -phase resolution: select a number of accumulator MSBs to be used for addressing your lut. You don't want a 2^32 data points in your lut. It is too much. Ignore the LSBs of accumulator for addressing.

    -amplitude resolution: number of bits per data point.

    The lut is just one exact cycle of sine/cosine

    it is also possible to compute phase points from adjacent sine/cosine points resulting in virtual large LUT.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Just to complete the story:

    there is also output resolution. This becomes relevant if lut data is wider than actual output. This could be the case in virtual LUT comptations.

    for sine data:virtual computation is based on adding to nearest lower sine lut point a value using some of the left-over accumulator LSBs(their MSB side), and a scale factor derived from lut cosine point.

    The reverse is true for cosine point computations.

    Finally there is cordic design, I don't know how it works but doesn't use lut.